Show HN: Tripoffice AI discovered 200k hotel rooms with a dedicated workspace https://ift.tt/HEY8p6w

Show HN: Tripoffice AI discovered 200k hotel rooms with a dedicated workspace https://ift.tt/OH0qDXd May 27, 2023 at 04:01AM

Show HN: Hacker News profile text can be used for prompt injection https://ift.tt/JTpxY9l

Show HN: Hacker News profile text can be used for prompt injection https://ift.tt/0hFoQMf May 27, 2023 at 09:10AM

Show HN: Eludris, A free and open source, federated and E2EE chat platform https://ift.tt/ebHNz8p

Show HN: Eludris, A free and open source, federated and E2EE chat platform https://ift.tt/Jq6H2PM May 27, 2023 at 01:38AM

Show HN: dotnet-console-games (40+ beginner-level coding project ideas) https://ift.tt/G2FNkPT

Show HN: dotnet-console-games (40+ beginner-level coding project ideas) https://ift.tt/gUmnsaO May 27, 2023 at 01:43AM

Show HN: A High-Performance CRC Hardware Generator in Bluespec SystemVerilog https://ift.tt/bMfJqC1

Show HN: A High-Performance CRC Hardware Generator in Bluespec SystemVerilog What is it and why make it? The Cyclic Redundancy Code(CRC) is an error-detecting code commonly used in digital networks and storage devices to detect accidental changes to digital data. And blue-crc repo provides a parallel, pipelined and highly-parameterized hardware implementation of CRC targeting high-throughput applications, such as network transmission. CRC is a mature and widely-adopted error-detecting technology, and there have been numerous hardware implementations of it. However, most existing hardware designs are either implemented using pure combinational logic or are only designed to process input data byte-by-byte serially, which results in extremely low throughput. Other designs targeting high-performance applications lack proper parameterization and only support some specific CRC configurations. Blue-crc aims to solve these problems by providing both high-throughput and well-parameterized CRC hardware implementation. Main Features of Blue-CRC Complete CRC Configuration: the implementation supports complete CRC configuration parameters, including polynomial, initVal(the initial CRC value), finalXor(the result is xor’d with this value if desired), reflectData(if True, the input bit order is reversed), and reflectRemainder(if True, the result bit order is reversed). Standard Interfaces: The input interface follows AxiStream protocol, with a parameterized data width. The output CRC result is guarded by the basic handshake protocol. Parallel: The IP is designed to process multiple bytes per cycle. Fully Pipelined: The implementation takes in raw data and produces results every cycle. High Throughput: The implementation, configured with 256-bit input and 32-bit CRC output, runs at 500MHz on Xilinx xcvu9p FPGA. Have a try? For BSV users, you can import our codes and instantiate CrcAxiStream interface in your design directly. Besides, we provide a script to generate custom Verilog CRC implementation automatically. If you are interested in high-performance CRC hardware acceleration, it’s worth giving it a try. We are also open to any recommendations for further improving our designs. Link GitHub: https://ift.tt/K5cYhBE References: https://ift.tt/JnoCypt https://ift.tt/K5cYhBE May 27, 2023 at 01:14AM

Show HN: I made an in-browser code editor with code replay and REPL https://ift.tt/hHFcx9Q

Show HN: I made an in-browser code editor with code replay and REPL I made a Logicboard.com — A collaborative code editor with code-replay feature. Code-replay lets you run the coding session like a movie, I wrote a blog post on how I implemented this: https://ift.tt/UfbRuKT You can try out the demo here: https://ift.tt/4pWwF7k And play around with the code editor here: https://ift.tt/pmt2AXa Logicboard also has an REPL shell, just type "start()" and hit enter in the output area. https://ift.tt/xqSa4D0 May 27, 2023 at 12:36AM

Show HN: Open-Source AI Embedding Pre-Processing Editor https://ift.tt/qfe6D1r

Show HN: Open-Source AI Embedding Pre-Processing Editor https://embedditor.ai May 26, 2023 at 11:41PM